CS 574

Homework 1

Due Monday, September 29, 2003

This homework is due at 11:00 if submitted electronically, or you can turn it in on paper in class at 11:30

Scheduling

Assume a SFQ two-level scheduler, as described in our Paper05. There are two job classes. Job class 1 is real-time, using a min-slack scheduling algorithm; this class is allocated 40% of the CPU. Job class 2 is "best-effort", using round-robin scheduling; this class is allocated the remaining 60% of the CPU.

Within the real-time job class, the following tasks arrive at Time 0:

Task Number	Deadline	Time Required	Times Blocked
1.1	120	30	70-100
1.2	200	40	50-110
1.3	190	20	60-160

You may assume prescience on the part of real-time tasks: they "know" in advance when they will be blocked and unblocked, and can use this information in calculating their slack times.

Within the best-effort job class, the following tasks arrive at Time 0:

Task Number	Times Blocked
2.1	140-180
2.2	130-170
2.3	150-180

Assuming a uniform 10 millisecond time quantum, draw a figure similar to Figure 3 in the paper showing the scheduling of these tasks and the progression of virtual time. Resolve ties by using the numerically lower task. Could the real-time tasks have met their deadlines if the best-effort tasks hadn't all been blocked simultaneously?

Solution:

It wouldn't have made it if process 2 hadn't blocked: process 1 wouldn't have gotten enough quanta.

Page Coloring

Consider a computer system with the following cache and virtual memory characteristics:

Cache

The cache is 128K, 2-way set-associative, with a 16 byte block size, physically addressed.

Virtual memory

The system uses a single-level virtual memory with a 4K page size. Both physical and virtual addresses are 32 bits.

1. How many bits of the virtual page number must remain unchanged to use page coloring?

   Since the page size is 4K bytes, the offset into a page is 12 bits (2¹² = 4K) leaving 20 bits of physical page number.

   Since the cache block size is 16 bytes the offset into a block is 4 bits (2⁴ = 16). As the total cache size is 128K, there are 8K blocks (128K/16 = 8K); since it's two-way set-associative, there are 4K sets. Consequently the set index field is 12 bits. This leaves 32 - 12 - 4 = 16 bits for the tag.

   The calculation of the bits that must be left unchanged for page coloring is best shown as a figure:

   

   Bits 12 through 15 appear as both page number bits that could be changed by a page replacement strategy, and as bits that are used in the set index. Consequently, they are the "bin bits."

2. Assume that your physical memory is initially completely free, and that an uncolored page replacement strategy will select physical pages for you in the order 00010000, 00020000, 00030000, 00040000, 00011000, 00021000, 00031000, 00041000, 00012000, 00022000, 00032000, 00042000, 00013000, 00023000, 00033000, 00043000 (these are the starting phyical addresses of the pages).

   Calculate the cache hit rate for the following virtual address reference string: 12340000, 21431000, 3ac12000, 66733000, 12340000, 21431000, 66733000, 3ac12000

   The following figure shows how virtual addresses are mapped to physical addresses, and physical addresses are mapped to cache, in this scenario.

   

   Here's what happens:

   1. 12340000 is mapped to 00010000, which maps to cache block 0. There is a cache miss, and 00010000 is brought into cache.
   2. 21430000 is mapped to 00020000, which also maps to cache block 0. There is another cache miss, and 00020000 is also brought into cache. Since the cache is 2-way set-associative, nothing needs to be ejected.
   3. 3ac12000 is mapped to 00030000, which also maps to cache block 0. There is another cache miss, and 00030000 is brought into the cache. Unfortunately, the set is full, so 00010000 is evicted.
   4. 66733000 is mapped to 00040000, which (you guessed it) also maps to block 0. Another miss, another block brought in, another eviction.
   5. 12340000 is accessed a second time; this time it's in memory, but it isn't in cache. 00010000 is brought into cache, 00030000 is evicted.

   And so forth. The hit rate is 0.

   Use page coloring to select a different order to bring the pages into physical memory. What is the cache hit rate now?

   Using page coloring, we assign pages whose bin bits are unchanged from the bin bits of the virtual addresses, like this:

   

   This time, following the same sequence of accesses as in the first part, we never have to evict a block from the cache. The result is a 50% hit rate.