CS 473 - HW7

VM and IO

Due Friday, May 3, 2002

(50 points) An Intel computer system's PDBR contains 0036a000.

Here's some of the contents of memory:

Address Contents
00032b90 001d9006

00061a7c 00248025

000e3378 003c0067

0014a80c 5a31f5bc

001d947c 410fb39e

0022f80c 772d4d8b

00248e7c 27c1b87c

0036a1b0 00032026

0036a488 000e3027

0036a4b8 003c3003

0036a4c4 003fb027

0036a7cc 00061027

003c099c 4f13e1d5

003c330c 0022f003

003fb82c 0014a006

Address	Contents
`00032b90`	`001d9006`
`00061a7c`	`00248025`
`000e3378`	`003c0067`
`0014a80c`	`5a31f5bc`
`001d947c`	`410fb39e`
`0022f80c`	`772d4d8b`
`00248e7c`	`27c1b87c`
`0036a1b0`	`00032026`
`0036a488`	`000e3027`
`0036a4b8`	`003c3003`
`0036a4c4`	`003fb027`
`0036a7cc`	`00061027`
`003c099c`	`4f13e1d5`
`003c330c`	`0022f003`
`003fb82c`	`0014a006`

And here's the TLB. Assume 32 entries, 4-way set-associative.

Set Tag Valid Translation

0 1d63d 1 35b0aa0a

0 1f7a7 0 17cdde4f

0 14215 0 6bc6b02e

0 0442a 1 5f21e80e

1 11d3b 1 19ec0823

1 041dc 1 78f6544b

1 11a34 0 1cfa9a1d

1 0de6d 1 4264122c

2 0ab64 1 0a309825

2 195bc 1 7276004a

2 091fa 0 56943633

2 13c04 1 1c81fc3c

3 09718 1 0022f003

3 1cc01 1 6d238438

3 1b510 1 18229c7d

3 1bdb3 1 629cac10

4 011ff 0 315fda58

4 0ac9c 1 3d454273

4 0bec8 1 0a1c9c07

4 156ed 1 558e8254

5 158b8 1 1b5c3e5e

5 18f6b 1 7e45f20f

5 18ca7 1 0f66e856

5 16f20 0 02222448

6 0f358 0 444c7a75

6 19155 0 2ba1147e

6 0911b 1 003c0067

6 0183d 1 6cb95a68

7 15bb0 0 0dfc9877

7 1f837 1 55b36c43

7 07b0b 1 1a76d008

7 0f9d3 0 11f77252

Set	Tag	Valid	Translation
`0`	`1d63d`	`1`	`35b0aa0a`
`0`	`1f7a7`	`0`	`17cdde4f`
`0`	`14215`	`0`	`6bc6b02e`
`0`	`0442a`	`1`	`5f21e80e`
`1`	`11d3b`	`1`	`19ec0823`
`1`	`041dc`	`1`	`78f6544b`
`1`	`11a34`	`0`	`1cfa9a1d`
`1`	`0de6d`	`1`	`4264122c`
`2`	`0ab64`	`1`	`0a309825`
`2`	`195bc`	`1`	`7276004a`
`2`	`091fa`	`0`	`56943633`
`2`	`13c04`	`1`	`1c81fc3c`
`3`	`09718`	`1`	`0022f003`
`3`	`1cc01`	`1`	`6d238438`
`3`	`1b510`	`1`	`18229c7d`
`3`	`1bdb3`	`1`	`629cac10`
`4`	`011ff`	`0`	`315fda58`
`4`	`0ac9c`	`1`	`3d454273`
`4`	`0bec8`	`1`	`0a1c9c07`
`4`	`156ed`	`1`	`558e8254`
`5`	`158b8`	`1`	`1b5c3e5e`
`5`	`18f6b`	`1`	`7e45f20f`
`5`	`18ca7`	`1`	`0f66e856`
`5`	`16f20`	`0`	`02222448`
`6`	`0f358`	`0`	`444c7a75`
`6`	`19155`	`0`	`2ba1147e`
`6`	`0911b`	`1`	`003c0067`
`6`	`0183d`	`1`	`6cb95a68`
`7`	`15bb0`	`0`	`0dfc9877`
`7`	`1f837`	`1`	`55b36c43`
`7`	`07b0b`	`1`	`1a76d008`
`7`	`0f9d3`	`0`	`11f77252`

Given all that, what happens when a user tries to write to each of the following addresses (you may get page faults, you may get protection faults, you may get TLB hits or misses...)

1b2e447c
4c60b80c
4b8c380c
7ce9fe7c
488de99c

(10 points) What is the maximum throughput of a 33 MHz, 32-bit PCI bus performing 32 bit transfers? What is it for 128 bit burst-mode transfers?
(10 points) What's the average rotational latency of a 7200 RPM disk drive? If the disk's average total access time, not including controller overhead, is 8.5 msec, what is its head seek time?
(30 points) Define an Intel 810 triangle vertex with the following properties:
- Location: (16.0, 16.0, 0.5)
- Enable wireframe for all edges of triangle
- Z bias: 0
- W: 1
- (A, R, G, B) = (1.0, 255, 0, 0)
- Fog factor: 128
- Specular blue: 0
- Texture coordinates: (0, 0, 0, 0)

Last modified: Mon Apr 29 13:42:32 MDT 2002